1. Field of the Invention
The invention generally relates to a debounce circuit, and more particularly, to a debounce apparatus able to make a composite judgment by counting a settling-time so as to eliminate the bounce phenomena.
2. Description of Related Art
During a system control process, signals are transmitted between components where the output signal of the previous stage usually serves as the input signal of the next stage. However, during transmitting signals, the signals output from the components, such as the signals input by a keyboard or keys, are not ones with ideal and perfect waveforms. According to the physical nature, when a characteristic or an electrical level is instantly changed, it is unable to change the state immediately. Instead, a reaction is produced, and in view of digital signal, before the signal enters the stable output state, a bounce phenomenon occurs where multiple digits 0 and 1 alternately move up and down. The phenomenon makes the system treat the signal at the input terminal thereof as a continuous input signal, which leads a state misjudgement and an error message.
In particular for some devices on a system, in terms of the setting of logic judgment, once a state-changing phenomenon is detected out, the system would enter a phase to process the voltage or the error message. Even further, an unstable signal may cause a system shutdown or crash. In this regard, prior to inputting the output signals of many devices to the components of the next stage, a debounce circuit is used to debounce and the input signal is transferred to the output signal through a debounce delay buffer until the state gets stable; and at the time, the signal is input to the component of the next stage.
FIG. 1 is a schematic block diagram of a conventional debounce circuit 10. Referring to FIG. 1, in a conventional debounce circuit, a flip-flop serial is employed serving as the design architecture. Only when all the output states of the flip-flop serial are the same, the output signals can change the states thereof. The more the flip-flops in series connection, the better the effect of the debounce circuit is; but such scheme easily leads to an excessive delay of the signal, reduces the response time of the system and is unable to achieve an immediate control effect.
For the currently available debounce circuits, if a wrong voltage level under a stable state occurs, the voltage level error would pass the filtering of the debounce circuit so as to cause a misjudgement of the system. Therefore, how to develop a debounce apparatus able to eliminate the influence of voltage level error under a stable state is a project to be solved.